FPGA Engineer(Hea Job/ 33)

Skills: 

Programming Language : Strong in VHDL along with Working knowledge on Verilog/System-Verilog

Preferable Skills:

* Use of tools such as Quartus, Vivado, Libero and their IP's

* Experience with using any simulator (Modelsim, XSIM, etc.)

* Deep understanding of FPGA design flow including RTL design, verification, logic synthesis, timing analysis, floor-planning, ECO, bring-up & lab debug.

* Experience with gate-level understanding of RTL and synthesis

* Experience with basic lab equipment such as Logic analyzers, scopes, protocol analyzers, etc.

* Development experience and board level debugging on Ethernet (1G, 10G) experience is preferable

* Experience in DDR3/DDR4 is preferable

* Experience in AMBA/AXI is preferable

* Good interpersonal and communication skills