RTL Design Engineer(Hea Job/ 157)

Requirements

roject Aurix 3G/RC1- Ethernet Engineer

Purpose Service Provider to provide Register-transfer level (“RTL”) Design and Verification services for Infineon project (s).

Service Results (including Scope of Work & Deliverables) Deliver all Service Results necessary for achieving the Purpose and in accordance with the Statement of Work, including but not limited to: System-On-Chip design and verification of complex SoC, including verification content planning and execution, test case creation and maintenance. ISO26262 functional safety verification of automotive products including fault simulation and documentation of results.

RTL coding for modules or SoC.

Documentation of work and results according to Infineon’s practise in project archive including archiving of document design data, change requests, application notes and lessons learnt.

To keep Infineon updated on Service performance and immediately notify Infineon in the event of any technical problems or foreseeable delays.

Service Requirements Service Provider shall maintain ownership over work packages of SoC verification for a dedicated module/subsystem/chip, including: Verification planning.

Drive review of verification plan with design and concept engineering.

Implementation or adaptation of SoC test cases according to plan.

RTL & gate-level simulation / signoff including functional and code coverage closure Test suite quality assurance using e.g. Certitude tools.

Debug of test failures in RTL & gate-level simulations.

Issue/bug tracking including driving for closure with concept and design engineering.

RTL design using the Very High Speed Integrated Circuit Hardware Description Language (“VHDL”).